HIGIPS is a N�~(M+1) multimicroprocessor
parallel machine whose architecture is the
combination of the pipeline architecture
and multiprocessor architecture, i.e., the
system in whole employs the pipeline architecture
and each stage of the pipeline employs the
multiprocessor architecture. Here, N is the
number of stages of HIGIPS and M+1 is the
number of processors in each stage. All processors
of HIGIPS are NEC ��PD70216 16-bit microprocessors.
The photo shows the prototype HIGIPS which
includes 3 stages, and each stage includes
3 processors (Max is 8).
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